Verilog Tutorial for beginners

Important Note - This tutorial requires download and installation of Xilinx ISE - which runs at more than 6 GB !!!. We suggest that you start with smaller free Icarus Verilog compiler ( only about 12 MB). Follow the tutorial here for Icarus bases tutorial.

This tutorial by is intended for beginners who wish to learn Verilog. Although intended for beginners, it can also be used as a reference material by experienced designers. We have also covered a number of working examples and projects at the end of the tutorial.


Hardware Description Language ( HD) is used to model digital circuils using codes. Verilog is one such language ( VHDL is another). In this tutorial we will briefly go into the details of the programming language itself. But our real focus will be on examples with working code and real life circuits.

After following this tutorial, you should be able to write Verilog codes for simple as well as moderately complex circuits. It is best if you follow this tutorial with Verilog compiler. We have used Free Xilinx tools. To be able to follow this tutorial, it is best to prepare an environment where you can compile and run the verilog codes.

Download the Free Xilix ISE tutorial from the site

This one is a paid verion - that you do not need for learning purpose

Scroll down to Windows installer ( This tutorial is based upon the Windows version of Xilinx, though the linus version should be about the same). You will need a corporate account to be able to download. It is a big 6.2 GB File so, be pateint. It will typically take 6 to 8 hours on a decent broadband connection. The best thing to do would be, to start download in the evening before you go to sleep, so that it is ready by the time you get up.

We received feedback that Xilinx is too big to download. We have therefore created a new tutorial based upon a free compiler that uses small footprint - icarus verilog. You can access that tutorial here .

So take a good nap and come back once you have downloaded it.

Some more Commentary on Verilog

Developed in mid-1980s Veriog was transferred to the IEEE and was formally defined by IEEE Standard 1364. The standard stood ratified in 1995 and was revised in 2001 that added many useful enhancements. Called Verilog-2001 , this standard will be followed in this tutorial.

Throughout this tutorial will emphasise the aspects of the hardware design rather than the language itself ( though we will cover the basics of the syntax as well).

Th syntax of Verilog is similar to the C language, but is tailored more towards the requirements of concurrent hardware operation. The hardware design is very unlike the sequential C. In the next page we will go through the installtion process to create an environment for learning verilog.