Creating new Symbol


So far we focussed upon creating Schematics, with the assumption that we already have symbols available in the library. If you are working in an organization, you may already have a large collection of symbols in library. Use these as much as possible, as these are pre tested and verified symbols that leads to less errors.

It is, however, inevitable that you will have to create new symbol at some point of time. This tutorial is focused on creating a new Symbol using Cadence Part Manager.

Tutorial Objective



The objective of this tutorial is to create a four pin IC called MIC94040. It has a footprint called MLF_1_2MMX1_2MM_4PIN in Allegro. The 4 pins are named as

Pin 1 - VOUT
Pin 2 - GND
Pin 3 - VIN
PIN 4 - Enable

We use Part developer to create new symbol. Click on Start -> Cadence -> Release 16.3 -> Project Manager -> Allegro Design Entry HDL SI XL ( SQ for EE) ->

( Note - Allegro Design Entry HDL L will not work)

Click Open C:\test\processor.cpm. The processor.cpm is the project we created in the last exercises. Click on Tools -> Library Tools -> Part Developer. At this stage Part Developer opens.

Click on File -> New Cells

In the Library Drop Down - select local_lib ( remember the directory that we copied from the Cadence to our C:/test directory)

In the cell name write MIC94040 and click ok. The part MIC94040 appears in the Cell Editor.

This youtube captures all of the things discussed above.


Next, we need enter the logical and physical pins.

We will now create the package for the MIC94040.

Right-click on the Packages entry in the cell tree and select New.

A new package gets created. By default, the package name has the same name as the cell name.

On the General page, the Logical & Physical Parts tree shows the logical and physical parts for a part. A logical part defines the logical pins for a part and is mapped to one or more physical parts. A physical part consists of the logical-to-physical pin mapping and a set of physical properties. Each primitive entry in the chips file represents a physical part. The name of a physical part is either the same as the logical part or the logical part name suffixed by a package type. The default physical part has the same name as the logical part. The packages that are valid for the specified PART_NAME appear under the Pack_Type entry of the tree.

Entering the Logical Pins

Click the Package Pin tab.

To add logical pins, choose Pins - Add.

The Add Pin dialog box appears.

Enter the To enter a power pin, select POWER in the Type drop-down list box.

Enter VOUT in the Prefix field and click Add. Next
Enter GND in the Prefix field and select Ground as type of Pin and click Add.Next
Enter VIN in the Prefix field and click Add.Next
Enter ENABLE in the Prefix field and select Input as type of Pin and click Add.Next


Specifying the Footprint

Click on the General tab.

To specify the JEDEC_TYPE, click on the browse button next to the Jedec Type field in the Associated Footprints group box.

The Browse Jedec Type dialog box appears.

Right-click on any one of the rows in the Browse Jedec Type dialog box and select Filter Rows.

The Filter Rows dialog box appears.

Enter MLF* in the Name column and click OK.

The Browse Jedec Type dialog box displays only the footprints starting from MLF. Select the required footprint.

( NOte : We assume that we have the MLF_1_2MMX1_2MM_4PIN footprint available in the Allegro Layout library. If not you can select any Allegro part that has 4 pins. If you are not sure of what Allegro is all about, you may like to check Allegro tutorial here .

Entering Physical Pins

Click on the Package Pin tab. The Package Pin page appears. Select Footprint - Extract from Footprint. The Part Developer message box appears. This message box states that all physical pins that exist in the package but are not available in the selected footprint will be deleted. Because there are no existing physical pins, click Yes. The physical pins get extracted from the footprint and appear in the Physical Pins grid. To sort the physical pins, click on the Number column heading.

Pin Mapping

Therefore, select 1 in the Physical Pins list and slot S1 for logical pin named VOUT in the Logical Pins list, and click Map. Repeat same for all other 3 pins

Creating Symbols

Click Generate Symbol(s). The Generate Symbol(s) for the Package dialog box appears.Click OK. The symbol is created and appears in the cell tree. Here is the complete video capturing the sequence Reference : We have borrowed part of the material from the Cadence Part development tutorial that can be accessed in your installation directory, typically residing in C:/Cadence/SPB_16.3/doc/pdv_tut/chap1.html