Reference Designer
Tutorials Home
Signal Integrity Basic
Introduction
Set up and Hold Time
Time and Length
Stack Up
Impedance
Calculator for Microstrip
Calculator for Stripline
Reflection and Impedance
Differential Signalling
Microstrip Differential Impedance Calculator
Stripline Differential Impedance Calculator
Noise and Bypass Capacitors
Books on SI
SI Advance Tutorials
Microstrip Impedance - Wadell Calculator
Stripline Impedance - Wadell Calculator
Misc SI Topics
Adding Intentional Delay
Length matching implemmentation
Signal Integrity Quiz
Signal Integrity Quiz #1
Signal Integrity Quiz #2
Signal Integrity Quiz
Signal Integrity Quiz # 1
Quiz from the book - Signal Integrity for PCB Designer.
Q1.
Which of the following has greatest effect in the increase in capacitance of a via.
A .
Increase in the pad size
B .
Increase in the number of power planes.
C .
Increase in the drill diameter
D.
Stripping off the inner layer pads
Q2.
Which of the following is not an example of differential bus.
A .
SATA Bus
B .
PCI-X
C .
HyperTransport
D.
USB
Q3.
Which of the following cases needs transmission line instead of an ordinary PCB trace on most urgent basis
A .
Low frequency small interconnect length
B .
Low frequency large interconnect length
C .
High frequency small interconnect length
D.
High frequency large interconnect length
Q4.
The output voltage in open circuit condition of a driver is 3.3v. The driver has an output impedance of 10 ohms. The driver is driving a 50 Ohm transmission line. The initial voltage launched into the transmission line is
A .
3.3V
B .
2.75V
C .
Depends upon the termination at the end of line.
D.
1.65 V
Q5.
Which of the following is not true about Near End Cross talk (NEXT)
A .
Near end cross talk amplitude saturates when the parallel length of the transmission line exceeds half the rise time of the signal.
B .
Near end cross talk increases in proportional to the length of the parallelism if the length of parallel traces is less than one half of the signal rise time.
C .
Increasing the length of parallelism beyond half the rise time increases the duration of the NEXT and not its amplitude.
D.
The Near End Cross Talk can not be reduced by separating the traces farther away
Q6.
Which of the following will NOT lead to reduction in cross talk level
A .
Reducing separation between traces
B .
Using stripline in place of microstrip.
C .
Reducing separation between the traces and the ground/power plane.
D.
Reducing the dielectric constant of the medium.
Q7.
Assume a ramp signal of 0 to 100 % rise time of Tr is incident on a transmission line of length equivalent to propagation delay of Tp. Tp is much greater than tr. Which one best describes the duration of the backward cross talk signal.
A .
Tp
B .
2Tp
C .
2Tp+2Tr
D.
Tp+Tr
Q8.
The shape of the forward cross talk is
A .
Same as the shape of the incident signal
B .
Same as the first derivative of the incident signal
C .
Same as the shape of the incident signal, except that it is inverted in sign.
D.
None of the above.
Q9.
Consider a pair of microstrip traces spaced at distance D apart. The separation from the ground plane is H. Which of these cases generates greatest amount of cross talk.
A .
D = 4 mils , H = 8 mils
B .
D = 6 mils, H = 8 mils
C .
D = 8 mils, H = 4 mils
D.
D = 8 mils, H = 6 mils
Q10.
A high speed digital signal has a 10% to 90% rise time of about 175 psec. What is the approximate bandwidth of the signal?
A .
10 MHz
B .
500 MHz
C .
2 GHz
D.
5 GHz
These quiz have been taken from the book
1.
Signal Integrity for PCB Designers
by Vikas Shukla.
Quiz #1
Quiz #2